Atari 130XE User Manual Page 56

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8 For experts: Technical details
“Ultimate 1MB BIOS”. It neither contains a standard interrupt handling nor a character
set at $E000. Therefore the screen is completely garbled when the freezer is activated
from within the “Ultimate 1MB BIOS”.
8.4 512k RAM extension
A separate 512k RAM chip is included for the 512k RAM extension. This way the freezer,
the cartridge emulation with modules in the freezer RAM, and the RAM extension can be
used in parallel to the full extent.
Because the PIA signals are not available on the PBI, the CPLD must mimic the
behavior of the PIA registers. The PIA in the Atari keeps working “in parallel”, so BASIC,
OS ROM, and Self Test are controlled as usual. Read access to the PIA is ignored by the
CPLD,
i. e.
in this case the Atari reads the real PIA registers as usual. The logic only
reacts on write access to the addresses $D301 (
PORTB
) and $D303 (
PBCTL
). The CPLD
also saves the value of bit 2 of
PBCTL
, which controls if the access is performed on the data
register PORTB (bit 2 = 1) or on the data direction register (bit 2 = 0).
The CPLD stores the data of a write access to $D301 either in the internal data register
or in the internal data direction register. If a PIA pin it setup as an input, then pull-up
resistors in the Atari pull it “high”. If a PIA pin is setup as an output, then the data
register controls if a “low” or a “high” signal is output.
The CPLD emulates exactly this behavior and therefore behaves exactly like every other
RAM extension in the Atari. The Oldrunner OS for example sets
PORTB
up as input
because the 400/800 had 4 joystick ports but no RAM/ROM control via
PORTB
. This
automatically deactivates every RAM extension, because bit 4 of
PORTB
must be “low” to
activate the RAM extension. But the emulated pull-up resistor in the CPLD pulls the pin
“high” automatically in this case, like it would have been the case in the PIA.
The rest of the RAM extension logic is relatively simple. If the
Ramdisk
switch is
turned
ON
and if bit 4 of the emulated
PORTB
register has the value
0
, then the internal
memory of the Atari is disabled for every access to $4000. . . $7FFF and a 16k bank of
the 512k RAM extension is mirrored in instead. The bits 2,3,5,6,7 of the emulated
PORTB
register determine in this case which of the 32 banks of 16k size shall be used.
8.5 Oldrunner
The Oldrunner is active if the
OldOS
switch is turned to
ON
). For every access to
$E000. . . $FFFF bank 127 of the flash ROM is mirrored in and for every access to
$C000. . . $CFFF the internal memory is deactivated. This makes the Atari behave exactly
like the original Atari 400/800, which did not have any memory at $C000. . . $CFFF. When
the Math Pack area ($D800. . . $DFFF) is accessed, the internal OS ROM of the Atari will
be mirrored in and the Math Pack contained in the OS will be used.
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